Fishing – trapping – and vermin destroying
Patent
1993-02-12
1994-11-08
Thomas, Tom
Fishing, trapping, and vermin destroying
437 38, 148DIG50, H01L 21441
Patent
active
053626788
ABSTRACT:
A semiconductor device includes a semiconductor substrate, first and second semiconductor layers of opposite conductivity types successively disposed on the semiconductor substrate, and a via hole structure including a hole penetrating through the first and second semiconductor layers and into the substrate, the via holes being defined by a side wall of the first and second layers and of the substrate, an electrically conducting material disposed on the side wall contacting the first and second semiconductor layers, and an electrically isolating region disposed in the first and second layers at the side wall and contacting the electrically conducting material. The electrically isolating region is formed with an ion flux applied either before or after etching of the via hole.
REFERENCES:
patent: 3969745 (1976-07-01), Blocker, III
patent: 3986196 (1976-10-01), Decker et al.
patent: 4635343 (1987-01-01), Kuroda
patent: 4646118 (1987-02-01), Takemae
patent: 4796070 (1989-01-01), Black
patent: 4868613 (1989-09-01), Hirachi
patent: 4937202 (1990-06-01), Maas
patent: 4939568 (1990-07-01), Kato et al.
patent: 5017999 (1991-05-01), Roisen et al.
patent: 5021845 (1991-06-01), Hasimoto
patent: 5025295 (1991-06-01), Kuesters et al.
patent: 5029321 (1991-07-01), Kimura
patent: 5105253 (1992-04-01), Polllock
Sumitani et al., "A High Power Aspect Ratio Via Hole Dry Etching Technique for High Power GaAs MESFET", IEEE GaAs IC Symposium, Oct. 1989, pp. 207-210.
Kobiki et al., "A Ka-Band GaAs Power MMIC", IEEE Monolithic Circuits Symposium, 1985, pp. 31-34.
Kobiki Michihiro
Komaru Makio
Chaudhari Chandra
Mitsubishi Denki & Kabushiki Kaisha
Thomas Tom
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