Fishing – trapping – and vermin destroying
Patent
1989-01-04
1990-10-09
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437974, 148DIG12, H01L 21304, H01L 2184
Patent
active
049620568
ABSTRACT:
According to the method of the present invention of manufacturing, from a semiconductor wafer, a dielectric substrate including insulated and separated island regions, a silicon oxide film is formed on a surface of a monocrystalline semiconductor wafer, and a mask consisting of a frame portion spreading on a peripheral region of the wafer and a grid-like portion arranged within the frame portion is formed. Then, in a patterning step, the surface of the wafer is exposed with the frame portion and the grid-like portion of the mask being left. Separation grooves arranged in a grid-like manner are formed in the exposed surface by etching. After a silicon oxide film is formed on the surfaces of the grooves, a polycrystalline semiconductor layer is made to grow on the silicon oxide film formed on the surfaces of the grooves and on the silicon oxide film formed on the surface of the wafer. The resultant structure is lapped from the side of the surface of the wafer such that the structure has a predetermined thickness as measured from a reference plane defined in the polycrystalline semiconductor layer, thus forming a plurality of island regions divided by the separation grooves.
REFERENCES:
patent: 4501060 (1985-02-01), Frye et al.
patent: 4567646 (1986-02-01), Ishikawa et al.
patent: 4638552 (1987-01-01), Shimbo
patent: 4851078 (1989-07-01), Short et al.
Frye et al., J. Electrochem. Soc.: Solid-State Science and Technology, vol. 133, No. 8 (Aug. 1987), pp. 1673-1677.
Matsuoka Nobutaka
Yamaki Bunshiro
Chaudhuri Olik
Kabushiki Kaishi Toshiba
Ojan Ourmazd
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