Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-05-25
2003-01-07
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S616000
Reexamination Certificate
active
06503779
ABSTRACT:
BACKGROUND OF TEE INVENTION
1. Field of the Invention
The present invention relates to a flip chip type semiconductor device and a method of manufacturing the same. In particular, the present invention relates to a flip chip type semiconductor device, from which a semiconductor chip can be recovered, having excellent mounting reliability, and a method of manufacturing the same.
2. Description of the Related Art
In a flip chip type semiconductor device, protruding bumps are formed with a metallic material such as a solder, Au, Sn—Ag alloys or the like on external terminals formed in the periphery of the semiconductor chip or external terminals formed in a prescribed area array on an active region. Such a flip chip type semiconductor device is mounted by an end user on a multi-layer wiring board on which electrode pads are arranged in the same pattern as the bums on the flip chip type semiconductor device. When a solder is used as a bump material to mount the flip chip type semiconductor device on the multi-layer wiring board, in general, bonding is carried out by an IR (infrared ray) reflow process, in which a flux is used and the bumps are heated to a prescribed temperature.
However, when the flip chip type semiconductor device is mounted on the multi-layer wiring board, stress distortion occurs due to a difference in linear expansion coefficients of the multi-layer wiring board and the flip chip type semiconductor device. Consequently, cracks occur at the interface between the flip chip type semiconductor device and the bumps. Therefore, mounting reliability, particularly, a temperature cycle characteristic of the flip chip type semiconductor device is degraded. Furthermore, since thermal and mechanical stresses upon mounting are applied to the semiconductor chip as well, the semiconductor chip, particularly, a passivation film and an active region surface under the passivation film are damaged.
In order to solve these problems, a technique has been conventionally proposed that a ceramic material such as AlN (aluminum nitrite), millite, glass ceramic or the like is used as a material for the multi-layer wiring board to minimize the difference in linear expansion coefficients between the material of the multi-layer wiring board and silicon, thereby minimizing the stress distortion. Thus, mounting reliability is improved.
Even though the mounting reliability is improved, however, cost is a problem in this technique since an expensive ceramic material is used as a material for the multi-layer wiring board. Therefore, in general, application of this technique is limited to fabrication of a high-priced super computer or large-scale computer.
On the other hand, recently, a technique is widely being utilized that an organic material, which has a high linear expansion coefficient but is relatively inexpensive, is used as a material for the multi-layer wiring board, and then an underfill resin is disposed between this multi-layer wiring board and a semiconductor chip. In this technique, the disposition of the underfill resin between the semiconductor chip and the multi-layer wiring board composed of organic material makes it possible to distribute a shearing stress imposed on bump bonding portions disposed between the semiconductor chip and the multi-layer wiring board. Thereby, mounting reliability is improved. This technique enables use of a multi-layer wiring board composed of inexpensive organic materials,
However, the above-described technique using an underfill resin has problems described below.
Firstly, it is difficult to recover a semiconductor chip. Since a high-performance LSI (large scale integrated circuit) is generally used as a flip chip type semiconductor chip, the semiconductor chip itself is expensive. Therefore, if a semiconductor chip is mounted on the multi-layer wiring board and then a defective site is detected in a portion other than the semiconductor chip during an electric screening process, the non-defective semiconductor chip needs to be recovered and reused. For example, if defective bonding is detected in a solder bump portion, the semiconductor chip needs to be peeled off and then bonded again. However, recovery of a semiconductor chip is technically difficult in the above-described structure of the flip chip type semiconductor device, in which an underfill resin is interposed between the semiconductor chip and the mounting board.
FIGS. 1A and 1B
are sectional views showing a method of mounting a conventional semiconductor device on a multi-layer wiring board.
FIG. 1A
shows the semiconductor chip. As shown in
FIG. 1A
, outer solder electrodes
13
are formed on the bottom surface of a semiconductor chip
24
.
FIG. 1B
shows a state that the semiconductor chip
24
is mounted. As shown in
FIG. 1B
, the semiconductor chip
24
is mounted and bonded onto a mounting board
25
by melting the solder bumps while the outer solder electrodes
13
are positioned on electrode portions (not shown) on the mounting board
25
. An underfill resin
26
is filled between the semiconductor chip
24
and the mounting board
25
. That is, the outer solder electrodes
13
are buried in the underfill resin
26
.
FIG. 1C
is a sectional view showing a method of recovering the semiconductor chip
24
. To recover the semiconductor chip
24
, as shown in
FIG. 1C
, the rear surface of the semiconductor chip
24
is suck by a heating/sucking tool
27
for repair while heated. Then, the semiconductor chip
24
is pulled up while the bump bonding portions are being melted. Thus, the non-defective semiconductor chip
24
is removed from the mounting board
25
.
FIG. 2
is a sectional view showing a state after the semiconductor chip
24
in the conventional flip chip type semiconductor device is removed from the mounting board
25
. As shown in
FIG. 2
, when a chip is removed from a semiconductor device having an underfill resin, problems arise that the outer solder electrodes
13
remain buried in the underfill resin
26
, the underfill resin
26
and the mounting board
25
are damaged and so forth. Therefore, the non-defective semiconductor chip
24
cannot be reused. With the above-described reasons, it is difficult to reuse a non-defective flip chip type semiconductor chip in the conventional technique.
Secondly, if voids exist in the underfill resin
26
or a bonding characteristic is unfavorable at the interface between the underfill resin
26
and the semiconductor chip
24
and the interface between the underfill resin
26
and the mounting board
25
, a peeling phenomenon is induced at the aforementioned interfaces in a hygroscopic reflow process for a product. Thus, a non-defective product becomes defective.
Thirdly, since a process of heating to a high temperature is performed when the semiconductor chip
24
is recovered, barrier metal-bonding portions of the removed semiconductor chip
24
and the outer solder electrodes
13
as well as a passivation film (not shown) are damaged. Thus, a non-defective semiconductor chip may become defective. The passivation film is formed for the purpose of protecting the active region of the semiconductor chip
24
and composed of PI (polyamide) organic material or inorganic material such as an SiO material such as SiO, SiO
2
or the like. Furthermore, thermal and mechanical loads applied to the outer solder electrodes
13
are transmitted to the semiconductor chip
24
, and thus a non-defective semiconductor chip
24
may become defective. In this case, peripheral devices including the mounting board
25
may also become defective.
Therefore, in reality, use of an organic material as a material for the multi-layer wiring board cannot lead to a lower cost.
When a ceramic multi-layer wiring board is used, recovery of a non-defective semiconductor chip is relatively easy since use of an underfill resin is not required due to optimization of the linear expansion coefficient of the ceramic material.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a low-cost flip chip type semiconductor device in which an u
Foong Suk-San
Fourson George
Katten Muchin Zavis & Rosenman
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