Method of manufacturing fet semiconductor devices with polysilic

Details Method of manufacturing fet semiconductor devices with polysilic Method of manufacturing fet semiconductor devices with polysilic

1995-05-01

1996-10-08

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 24, 437 40, 437 57, 437967, H01L 21265, H01L 2120, H01L 2170, H01L 2700

Patent

active

055630936

ABSTRACT:
The present invention provides the method of manufacturing a dual-gate CMOS device which has high transconductance and improved breakdown voltage, in which depletion in the interface between a gate oxide and a gate electrode is prevented without the increase of the steps of process.
A gate oxide film (5) formed on a semiconductor substrate (1) is washed with an aqueous solution, or exposed to a gas atomosphere containing hydrogen, and an amorphous silicon film (3) is formed on the whole surface of the gate oxide film (5). The amorphous silicon film (3) is then crystallized. Alternatively, after a silicon oxide film (53) or a silicon nitrided film is formed on the amorphous silicon film (3), the amorhpous silicon film (3) is crystallized.

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