Method of manufacturing electronic part packaging structure

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support

Reexamination Certificate

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Details

C438S622000, C029S846000, C029S849000, C029S874000

Reexamination Certificate

active

11122098

ABSTRACT:
A method of manufacturing an electronic part packaging structure including a step of mounting an electronic part, which has a connection terminal and a passivating film to cover the connection terminal, on a mounted body to direct the connection terminal upward, a step of forming an insulating layer to cover the electronic part, a step of forming a via hole in a portion of the passivating film and the insulating layer on the connection terminal to expose the connection terminal, and a step of forming a wiring pattern, which is connected electrically to the connection terminal via the via hole, on the insulating layer.

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patent: 2000-323645 (2000-11-01), None

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