Method of manufacturing dielectrically isolated semiconductive d

Details Method of manufacturing dielectrically isolated semiconductive d Method of manufacturing dielectrically isolated semiconductive d

1975-10-01

1977-06-28

Van Horn, Charles E.

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29578, 148189, 156661, 357 50, 357 55, 427 88, H01L 21223

Patent

active

040323730

ABSTRACT:
A matrix array of semiconductor diodes formed in an epitaxial layer of a semiconductor wafer and being dielectrically isolated from each other by two orthogonal sets of parallel insulating oxide regions, one set extending completely through the epitaxial layer and the other set extending only partially through the epitaxial layer. A preferred method of forming the matrix array is also disclosed.

REFERENCES:
patent: 3005937 (1961-10-01), Wallmark et al.
patent: 3768150 (1973-10-01), Sloan et al.
patent: 3796612 (1974-03-01), Allison
patent: 3892608 (1975-07-01), Kuhn
patent: 3928091 (1975-12-01), Tachi et al.
patent: 3930300 (1976-01-01), Nicolay
patent: 3990927 (1976-11-01), Montier

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