Method of manufacturing copper-clad laminate for VOP...

Details Method of manufacturing copper-clad laminate for VOP... Method of manufacturing copper-clad laminate for VOP...

2006-09-21

2010-10-05

Talbot, Brian K (Department: 1715)

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

C427S154000

Reexamination Certificate

active

07807215

ABSTRACT:
Disclosed herein is a method of manufacturing a copper-clad laminate for Via-On-Pad application. The pad includes the steps of providing a first copper foil layer and a second copper foil layer, on the first surfaces of which protective layers are formed; placing two sets of a first copper foil layer, an insulating layer and a second copper foil layer above and below an adhesive layer, respectively; removing the protective layers, which have been respectively formed on the second copper foil layers, and parts of the second copper foil layers; forming via holes by removing parts of the insulating layers through the regions from which the parts of the second copper foil layers have been removed, using laser processing; and forming two copper-clad laminates by removing the protective layers, which have been respectively formed on one surface of one first copper foil layer and one surface of the other first copper foil layer, and the adhesive layer.

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Japanese Patent Office Action, mailed May 20, 2008 and issued in corresponding Japanese Patent Application No. 2006-257591.
Japanese Office Action issued on Dec. 16, 2008 in corresponding Japanese Patent Application 2006-257591.

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