Method of manufacturing CMOS image sensor

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

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Details

C438S090000, C438S302000, C438S305000, C438S525000, C438S529000, C257SE27133

Reexamination Certificate

active

07625774

ABSTRACT:
Embodiments relate to a method of manufacturing a CMOS image sensor in which, when a buried photodiode is formed, a p-type impurity region may be formed simultaneously with a p-type LDD region in the photo diode region. Additionally, a p-type impurity region may be formed under side wall spacers, which may reduce leakage current of the photodiode. In embodiments, the method may include providing a semiconductor substrate divided into a pMOS region, a nMOS region, and a diode region, forming a shallow trench isolation (STI) on the semiconductor substrate, opening only the nMOS region and implanting low density n-type impurities to form an n-type LDD region, opening the diode region and pMOS region and implanting impurities to form a p-type impurity region and a p-type LDD region, opening only the diode region and implanting impurities to form an n-type impurity region, forming side wall spacers on both side walls of the gate, opening only the nMOS region and implanting high density n-type impurities to form an n-type source and drain region, and opening only the pMOS region and implanting high density p-type impurities to form p-type source and drain region.

REFERENCES:
patent: 6027955 (2000-02-01), Lee et al.
patent: 6329233 (2001-12-01), Pan et al.
patent: 7345703 (2008-03-01), Lee
patent: 2003/0151076 (2003-08-01), Kim
patent: 2005/0151212 (2005-07-01), Hong
patent: 2006/0243981 (2006-11-01), Rhodes
patent: 2007/0148929 (2007-06-01), Lee
patent: 2007/0166865 (2007-07-01), Lee

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