Method of manufacturing bipolar transistor with self-aligned ext

Details Method of manufacturing bipolar transistor with self-aligned ext Method of manufacturing bipolar transistor with self-aligned ext

1988-08-11

1989-10-03

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437192, 437228, 148DIG10, 148DIG11, 357 34, H01L 21265

Patent

active

048716855

ABSTRACT:
A metal layer is formed by selective CVD method on an emitter region formed by using a field oxide film as a mask. Opening for ion-implanting an impurity for forming external base region is formed in the field oxide film by utilizing the metal layer and a metal layer creep up a bird's beak of the field oxide film as masks. An impurity is doped in a semiconductor substrate through the opening formed in the field oxide film to form external base region. The distance between the emitter region and external base region is controlled by a length of the metal layer creep up the bird's beak.

REFERENCES:
patent: 4486946 (1984-12-01), Jopke
patent: 4728618 (1988-03-01), Hirao
patent: 4764482 (1988-08-01), Hsu
patent: 4778774 (1988-10-01), Blossfeld

Affiliated with

Also associated with

Rating

Method of manufacturing bipolar transistor with self-aligned ext does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing bipolar transistor with self-aligned ext, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing bipolar transistor with self-aligned ext will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-664040