Fishing – trapping – and vermin destroying
Patent
1990-01-19
1992-03-31
Quach, T. N.
Fishing, trapping, and vermin destroying
437162, 437228, 148DIG124, H01L 21328
Patent
active
051008130
ABSTRACT:
A method of manufacturing a bipolar transistor. A first mask material film pattern is formed on an internal base region prospective portion on a collector region of a first conductive type, and then a first conductive film is deposited. A recess around the projection of the mask film pattern are transferred on the surface of the first conductive film. After a second mask material film pattern is buried in the recess, the first conductive film is selectively etched using the second mask material pattern as a mask, thereby exposing the first mask material film pattern. The first conductive film is continuously, selectively etched by anisotropic etching using the exposed first mask material film pattern and the second mask material film pattern as etching masks to form a first opening between the two mask material film patterns. An impurity of a second conductivity type is doped in the wafer through the first opening to form an external base region of the second conductivity type. The first opening is buried with a second conductive film bfore or after formation of the external base region. The first mask material film pattern is removed to form a second opening. After a thermal oxide film is formed on the surface of the second conductive film, an impurity of the second conductivity type is doped in the wafer through the second opening, thereby forming the internal base region. An impurity of the first conductivity type is doped in the wafer through the second opening to form an emitter region.
REFERENCES:
patent: 4693782 (1987-09-01), Kikuchi et al.
patent: 4780427 (1988-10-01), Sakai et al.
patent: 4908324 (1990-03-01), Nihira et al.
IEEE Transactions on Electron Devices, vol. ED.33, No. 4, Apr. 1986, Shinsuke Konaka et al., "30-ps Si Bipolar IC Using Super Self-Aligned Process Technology" pp. 526-531.
ISSCC 87/Wednesday, Feb. 25, 1987/Rhinelander South/WAM 4.4, 1987, "Session IV: High-Speed Circuit Technology" pp. 58-59.
Itoh Nobuyuki
Nihira Hiroyuki
Kabushiki Kaisha Toshiba
Quach T. N.
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