Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor
Reexamination Certificate
2001-01-17
2003-04-22
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Bipolar transistor
C438S309000
Reexamination Certificate
active
06552374
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a silicon-germanium heterojunction bipolar transistor (SiGe HBT) and a structure thereof, and more particularly, to a method of forming a base layer including silicon-germanium by epitaxial growth and a structure of the SiGe HBT in a heterojunction bipolar transistor used as a high-speed device.
2. Description of the Related Art
Presently, due to continuous research and development in the field of electronics and telecommunications, optical transmission at a transmission rate of 10 Gbps or more is practicable using a high-speed device of 60 GHz class or more. In near future, it is expected that a 20~30 Gbps IC for the optical transmission will be developed using the high-speed device of 100 GHz and an optical transmission system of few hundred Gbps class will be commercialized. In the field of a mobile communication, a terminal is essentially required to be much smaller, lighter, and, as the same time, multi-functionalized with lower power consumption. Therefore, RF (radio frequency) components, which are large in their size, should be formed into an IC. By a development of hybrid IC technology and MMIC (monolithic microwave integrated circuit) technology, the RF components may be formed into the IC, and the quality of the terminal and system is improved.
As one of the silicon bipolar devices, the SiGe HBT in which silicon-germanium is used as a base layer has a high operating speed of 100 GHz or more, and is in the limelight as an advanced high-speed device. The SiGe HBT device employs almost all the existing silicon process as it is and forms the base layer having a thin thickness of 0.02 &mgr;m with the silicon-germanium using the epitaxial growth. Since the base layer (about 0.02 &mgr;m) is thinner than that of a conventional junction transistor and is formed by epitaxial growth using silicon-germanium having a smaller band gap than silicon, there is some advantage to obtain a high current gain and operating speed with lower power consumption.
A conventional method of manufacturing the SiGe HBT and structure thereof is as follows.
FIG. 1
shows a cross-sectional view of a conventional heterojunction transistor defining a collector area by LOCOS (local oxidation of silicon) method.
Ion-implanting an n-type impurity in a p- type silicon substrate
1
forms a buried collector
11
. Depositing n-type silicon on an entire surface of the substrate, in which the buried collector is formed, forms a collector thin film. On the collector thin film, an anti-oxidizing insulation film used as a mask covers a collector area and a collector sinker area. Then, the silicon exposed through the mask is oxidized by the LOCOS method to form a collector insulation film
17
. Therefore, on a portion of the buried collector
11
, the collector thin film except the active collector region and the collector sinker area is formed into the collector insulation film (field oxide film)
17
formed of silicon dioxide. An n-type impurity is implanted in the collector sinker area and then heat-treated at a high temperature to form a collector sinker
13
. A silicon-germanium thin film for forming the base is grown on the entire surface of the substrate and is then patterned, except for the collector
15
and a portion of the collector insulation film
17
around the collector
15
so as to form a base thin film. Formed on the collector
15
, is a single crystal base
25
. The base
25
is extended laterally on the collector insulation film
17
. The base
25
on the collector insulation film
17
is formed into a polycrystalline or amorphous base semiconductor electrode
23
. On the entire surface, there is deposited silicon dioxide or silicon nitride to form an emitter insulation film
37
. The emitter insulation film
37
is patterned so as to be opened a portion thereof corresponding to an active area of the base (
25
), thereby defining an emitter area. On the entire surface of the substrate, there is an emitter electrode
39
formed of a polycrystalline silicon containing the n-type impurity such as arsenic and phosphorus, and so forth. Then, the emitter semiconductor electrode
39
is heat-treated to diffuse the n-type impurity on the base thin film and thus form an emitter
35
. The silicon dioxide or the silicon nitride is deposited on the entire surface of the substrate to form a protecting film
77
. The protecting film
77
is patterned to form a contact window for exposing the emitter
35
. Further, the protecting film
77
and the emitter insulation film
37
are patterned to form the contact windows for exposing the base semiconductor electrode
23
and the collector sinker
13
. Finally, a metal layer is deposited and then patterned to form a base terminal
81
contacted through the contact window with the base semiconductor electrode
23
, an emitter terminal
83
contacted through the contact window with the emitter
35
and a collector terminal contacted through the contact window with the collector sinker
13
(FIG.
1
).
In the LOCOS method as described above, between the collector insulation film containing the silicon dioxide and the collector area containing the n-type impurity, a clean film is formed without any crystal defect. However, during the local oxidation of a part of the silicon layer, a bird's beak is formed at a side of the boundary surface. The protruding portion acts as an obstacle to scaling down the device. Further, when the silicon-germanium thin film grows on the substrate of the silicon dioxide film (collector insulation film) and the silicon (collector), there is a problem that the silicon-germanium thin film grows selectively on the silicon portion of the substrate.
In order to solve the problem, there is provided a selective epitaxial growth (SEG) method for manufacturing a high density and sub-micron heterojunction transistor.
FIG. 2
shows a cross-sectional view of a structure of a SiGe HBT manufactured by the SEG method. The manufacturing method will be described more fully.
Ion-implanting an n-type impurity in a p- type silicon substrate
1
forms a buried collector
11
. Formed on an entire surface of the substrate, on which the buried collector is formed, is a collector insulation film
17
of silicon dioxide. After defining a part of the collector insulation film
17
, some portions of the collector insulation film
17
corresponding to a collector area and a collector sinker area are removed so as to expose a portion of the buried collector
11
. A pattern shape of the removed collector insulation film
17
is formed to have a vertical sidewall. The collector area and the collector sinker area formed on a surface of the single crystal buried collector exposed through the removed portion of the collector insulation film
17
are filled with the single crystal silicon by the SEG method. At this time, the single crystal silicon excessively grows in the form of a mushroom to be higher than the collector insulation film
17
. Then, a protruded portion of the grown single crystal silicon is removed by a chemical-mechanical polishing (CMP) method to flat the surface of the substrate. On the substrate on which a collector
15
and a collector sinker
13
are formed to have a vertical sidewall and a flat surface, silicon-germanium grows to form a base thin film. At this time, single crystal silicon-germanium grows on the single crystal silicon, i.e. the collector
15
to form a base
25
making a junction with the collector
15
. Meanwhile, on the collector insulation film
17
formed of the silicon dioxide, polycrystalline or amorphous silicon-germanium grow. Formed on the base thin film is a base ohmic electrode layer
29
of a metal material in order to reduce a contact resistance. A portion of the base ohmic electrode layer
29
corresponding to the base
25
is removed to expose the base
25
. And in order to prevent the base ohmic electrode layer
29
from being electrically contacted with an emitter to be formed, silicon dioxide or sili
Cho Deok-Ho
Han Tae-Hyeon
Lee Soo-Min
Ryum Byung Ryul
ASB Inc.
Jacobson & Holman PLLC
Nelms David
Vu David
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