Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
2001-03-23
2002-12-03
Tsai, Jey (Department: 2812)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C438S942000, C438S149000
Reexamination Certificate
active
06489176
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-085103, filed Mar. 24, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing an array substrate for display devices such as an active matrix type liquid crystal display device and an organic electroluminescence (EL) display device, particularly, to a method of manufacturing an array substrate using a polycrystalline silicon and a method of manufacturing a display device.
In recent years, a liquid crystal display device is widely used in a notebook type computer or various portable apparatuses because of its big merits such as a high image quality, a thin and lightweight structure, and a low power consumption. In this connection, keen attentions are paid to a further improvement in the performance and the manufacturing technology of the liquid crystal display device. Particularly, an active matrix type liquid crystal display device, in which a switching element such as a thin film transistor (TFT) is connected to each display pixel, attracts attentions because a large display screen can be obtained easily and the particular liquid crystal display device can be manufactured by the conventional semiconductor manufacturing technology. Also, the research and development of a TFT used in an array substrate of a liquid crystal display device are being made vigorously. Recently, a TFT using a polycrystalline silicon having a high field-effect mobility is being studied vigorously.
The array substrate of a liquid crystal display device equipped with such TFTs is manufactured as follows. In the first step, a semiconductor layer consisting of a polycrystalline silicon is formed on an insulating substrate such as a glass substrate. Then, a gate insulating film is formed in a manner to cover the semiconductor layer, followed by forming a first wiring layer (gate electrodes and gate wirings integral with the gate electrodes) on the gate insulating film.
In the next step, source regions and drain regions are formed by doping a large amount of phosphorus, boron or the like in the semiconductor layer by an ion implantation method, by using the first wiring layer itself or the resist film, used in forming the first wiring layer, as a mask.
Since the dopant as doped is not activated, a heat treatment is applied after the doping step so as to activate the dopant, thereby ensuring a desired low resistivity. The heat treatment is carried out at high temperatures, i.e., at 500 to 600° C.
After the heat treatment, an interlayer insulating film is formed in a manner to cover the gate electrodes and the gate insulating film, followed by forming a contact hole in each regions of the gate insulating film and the interlayer insulating film which are positioned above the source regions and the drain regions.
Further, source electrodes and drain electrodes are formed as a second wiring layer on the interlayer insulating film. the source electrode is connected to each source region via the contact hole, and the drain electrode is connected to each drain region via the contact hole. Also, pixel electrodes are formed in parts on the interlayer insulating film except the TFT forming regions and connected to the respective source electrodes. Finally, a protective film is formed on the entire surface of the substrate, thereby preparing a desired TFT array substrate.
In the TFT described above, the semiconductor layer is formed of polycrystalline silicon and, thus, exhibits a high field-effect mobility, making it possible to enhance the driving capability of the liquid crystal and to miniaturize the individual TFT. As a result, where a liquid crystal display device is prepared by using the TFT array substrate described above, the aperture rate is improved so as to improve the brightness of the displayed image or to lower the power consumption.
Also, in the case of using a polycrystalline silicon, it is possible to obtain a high field-effect mobility, making it possible to form integrally a circuit such as a shift register for controlling the operation of the TFTs on the glass substrate by utilizing the foregoing semiconductor layer. In this case, it is unnecessary to provide separately an integrated circuit for driving the TFTs, and the external circuit can be simplified, with the result that it is possible to decrease the number of manufacturing steps of the entire liquid crystal display device and to lower the manufacturing cost.
However, in the manufacturing process of a polycrystalline silicon TFT array, the heat treatment is carried out at temperatures higher than that in the manufacturing process of an amorphous silicon TFT array in many cases. Particularly, the heat treatment after the impurity doping step is carried out at a high temperature in manufacturing a polycrystalline silicon TFT array, with the result that the glass substrate is thermally expanded or thermally shrunk greatly.
Under the circumstances, a glass substrate as used in an amorphous silicon TFT array substrate cannot be used in a polycrystalline silicon TFT array substrate, making it unavoidable to use an exclusive glass substrate having a higher durability in a polycrystalline silicon TFT array substrate.
However, even in the case of using the exclusive glass substrate in a polycrystalline silicon TFT array substrate, it is impossible to avoid the thermal expansion or thermal shrinkage of the glass substrate. Therefore, the finally prepared array substrate is expanded or shrunk relative to a counter substrate, though it is certainly possible to automatically correct the relative positional relationship among the light-exposed patterns by a light exposure machine in each photo engraving process (PEP) in which the light exposure, the development and the etching are carried out by using a photolithography, giving rise to the problem that it is difficult to assemble the array substrate accurately relative to the counter substrate.
It should also be noted that, in a PEP in which the automatic correction cannot be achieved by a light exposure machine, e.g., a collective light exposure step using a large mask, the patterning is performed without taking the expansion or shrinkage of the substrate into consideration, with the result that the formed pattern is deviated from the pattern formed in advance. Particularly, where contact holes are included in the pattern, the contact holes are deviated from desired positions, giving rise to a poor connection of the source electrodes, the drain electrodes, etc. and, thus, to a defective display such as a point defect.
BRIEF SUMMARY OF THE INVENTION
The present invention has been contrived in consideration of the above circumstances and its object is to provide a method of manufacturing an array substrate and a method of manufacturing a display device, having a suppressed defective display such as a point defect and a high reliability while preventing the deviation of patterning due to deformation of the substrate.
According to an aspect of the present invention, there is provided a method of manufacturing an array substrate for a planar display device, including a plurality of first wiring layers and a plurality of second wiring layers formed on a substrate and a plurality of pixels connected to the first and second wiring layers via thin film transistors, wherein each of the thin film transistors includes a semiconductor layer formed of polycrystalline silicon and a gate electrode formed on the semiconductor layer with a gate insulating film interposed therebetween, the method comprising:
a first pattern forming step of forming a first pattern on the substrate by correcting in advance the size of the first pattern in view of the amount of deformation of the substrate; and
a second pattern forming step of forming a second pattern on the substrate in conformity with the first pattern by a collective process.
According to the manufacturing method
Kabushiki Kaisha Toshiba
Pillsbury & Winthrop LLP
Tsai Jey
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