Method of manufacturing and using alignment marks

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature

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H01L 2176

Patent

active

059435887

ABSTRACT:
A method and apparatus for using alignment marks to locate buried structures in integrated circuits is provided. An alignment mark is used to locate a circuit area to be operated on. Underlying features of the circuit area are located based on the known location of the alignment marks. These underlying features are then operated on.

REFERENCES:
patent: 3875414 (1975-04-01), Prior
patent: 4884122 (1989-11-01), Eichelberger et al.
patent: 5310691 (1994-05-01), Suda
patent: 5316966 (1994-05-01), Van Der Plas et al.
patent: 5332470 (1994-07-01), Crotti
patent: 5346858 (1994-09-01), Thomas et al.
patent: 5468580 (1995-11-01), Tanaka et al.
patent: 5546279 (1996-08-01), Aota et al.
patent: 5578519 (1996-11-01), Cho
patent: 5633103 (1997-05-01), Demarco et al.
patent: 5700732 (1997-12-01), Jost et al.

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