Method of manufacturing an SOI (silicon on insulator) wafer

Details Method of manufacturing an SOI (silicon on insulator) wafer Method of manufacturing an SOI (silicon on insulator) wafer

2001-09-27

2003-09-30

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Thinning of semiconductor substrate

C438S785000

Reexamination Certificate

active

06627519

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention is to suggest a different method of manufacturing SOI wafer and more specifically, to improve chemical, mechanical , and electrical properties of SOI wafer, to diversify the structure and composition of the wafer, and to improve on fabrication process of such wafers.
Silicon On Insulator type of wafers is widely used in wafer manufacturing process. This process is to form an insulator on top of the semiconductor wafer and then to form single crystal silicon layer before fabrication of semiconductor device.
SOI wafer is known to offer lateral and vertical isolation of integrated components and also to provide devices with superior electrical properties.
In a SOI wafer, two different processes are widely used in general. One of them is so called BE (Bond and Etch) method, which is to bond two wafers and etch back one of them in order to make a thin layer. The other is called SIMOX(Separation By Implantation of oxygen) method, which is to implant oxygen deep into the silicon wafer and form a buried oxide and a thin silicon layer by post-implantation heat treatment.
Smart Cut process is to implant hydrogen ions into an oxidized wafer A (through the insulator) by controlling the energy (depth) of hydrogen ions in order to control the film thickness. This wafer A is then bonded to another silicon wafer B. During subsequent annealing, bonded wafers separate at the region where the implanted hydrogen ions have stopped. This separation results in a thin Si film separated from the wafer B by a buried oxide. Finally, CMP process is applied in order to obtain a smoother surface and the desired thickness of the silicon film. This method is relatively easier than other processes such as SIMOX method and therefore, is being widely used recently.
In the Smart Cut technology mentioned above, the Smart Cut process disclosed in U.S. Pat. No. 5,882,987 (Smart Cut process with thin film semiconductor material on insulating film) claims to use CMP process in order to solve non-uniform surface problem and thin film formation problem, which are known problems associated with Smart Cut processes.
In case where SiO
2
is used as an insulation film, the thickness and quality of the buried insulator is controlled with conventional technologies (oxidation), as shown in FIG.
4
. Since the chemical properties change by heating above 1000° C. in dry oxygen ambient (see table 4), such a control is not perfect.
SUMMARY OF THE INVENTION
The invention is to generate SOI wafer despite all the known problems associated with it. It is the purpose of this invention to improve the film properties, to generate uniform surface structure without requiring high process temperature, and to diversify the nature of the insulating film. This new invention of SOI wafer manufacturing method includes steps of: (
100
) Preparation of silicon wafers with designed thickness and diameter; (
110
) forming alumina (Al
2
O
3
) insulation film or other dielectric film on the surface of the prepared silicon wafer by atomic layer epitaxial method such as ALCVD, ALD, ASCVD, etc.; (
120
) Bonding this wafer with another silicon wafer (oxidized or not) by various methods; (
130
) Cutting one of the bonded wafers by various methods; (
140
) Polishing the cut surface of the wafer.


REFERENCES:
patent: 4834809 (1989-05-01), Kakihara
patent: 6087242 (2000-07-01), Maris et al.
patent: 6133106 (2000-10-01), Evans et al.
patent: 6355561 (2002-03-01), Sandhu et al.
patent: 6417075 (2002-07-01), Haberger et al.

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