Method of manufacturing an isolation layer of a flash memory

Details Method of manufacturing an isolation layer of a flash memory Method of manufacturing an isolation layer of a flash memory

2007-05-01

2007-05-01

Hoang, Quoc (Department: 2818)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S296000, C257SE21546

Reexamination Certificate

active

11320580

ABSTRACT:
A method including forming a first mask material layer on a semiconductor substrate in order to mask a cell region and to not mask a peripheral circuit region. The method further includes forming a second mask material layer on an entire surface of the substrate in the cell region and peripheral circuit region, simultaneously forming a trench having a first depth in the cell region and a trench having a second depth in the peripheral circuit region, where the second depth is greater than the first depth. The method also includes filling an insulation layer into an entire surface of the substrate including trenches, planarizing the insulation material layer and the second mask material layer to a degree that the first mask material layer is exposed, and respectively forming an STI isolation layer in both the cell region and the peripheral circuit region by removing the first and second mask material layer.

REFERENCES:
patent: 6879000 (2005-04-01), Yeo
patent: 2005/0142808 (2005-06-01), Otsuki
patent: 2005/0230780 (2005-10-01), Ito et al.

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