Method of manufacturing an integrated CMOS of ordinary logic cir

Details Method of manufacturing an integrated CMOS of ordinary logic cir Method of manufacturing an integrated CMOS of ordinary logic cir

1987-07-16

1989-04-04

Roy, Upendra

Fishing, trapping, and vermin destroying

357 42, 437 34, 437 46, 437 56, 437 59, H01L 21265

Patent

active

048187194

ABSTRACT:
A method of manufacturing a semiconductor device having a high voltage CMOS unit for an ordinary logic operation and a MOS unit which are provided in a single semiconductor substrate of a first conduction type. The method includes the steps of performing an element region making process for making a well of a second conduction type in the substrate, performing a process for providing field-effect transistors having channels of mutually different conduction types in the substrate and the well, and then performing a process for providing electrode wiring layers. Finally, a process is performed for providing a first impurity region having a particular conduction type and serving as a channel stopper of the CMOS unit and a second impurity region having the conduction type of the first impurity region and serving as an offset low-resistance layer of the high voltage MOS unit.

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patent: 4696092 (1987-09-01), Doering et al.
Martin et al, IEDM, 1984, pp. 266-269.

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