Method of manufacturing an integrated circuit including an analo

Metal treatment – Process of modifying or maintaining internal physical... – Chemical-heat removing or burning of metal

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29577C, 29578, 148 15, 148187, 357 35, 357 36, 357 44, 357 46, 357 92, H01L 2122, H01L 2704, H01L 2972

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041971477

ABSTRACT:
A method of manufacturing an integrated circuit including an analog circuit and an I.sup.2 L circuit which both contain NPN transistors on a P-type semiconductor chip in which the method includes an N.sup.+ diffusion step for producing a flat diffusion for certain NPN transistors having smaller penetration depth than N.sup.+ regions of the other NPN transistors for connection of an emitter electrode to the said certain NPN transistors.

REFERENCES:
patent: 3566218 (1971-02-01), Widlar et al.
patent: 3770519 (1973-11-01), Wiedmann
patent: 3810123 (1974-05-01), Baitinger et al.
patent: 3969748 (1976-07-01), Horie et al.
patent: 4043849 (1977-08-01), Kraft et al.
patent: 4087900 (1978-05-01), Yiannoulos
Jakits, V. O., "Integrierte Injektion Slogik . . . " Valvo Berichte, vol. XVIII, Book 1/2, pp. 215-226, Apr. 1974.
Berger et al., "Integrated Transistor . . . Variable-Current Amplification" I.B.M. Tech. Discl. Bull., vol. 15, No. 5, Oct. 1972, p. 1625.

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