Method of manufacturing an assembly with different types of high

Semiconductor device manufacturing: process – Making regenerative-type switching device – Having field effect structure

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438187, 437 40, H01L 21332

Patent

active

061107646

ABSTRACT:
A method of manufacturing high-voltage MOS devices that uses trenches instead of field oxide layer as the isolating structure, and employs a vertical layout rather than a horizontal layout to lengthen the drift region for a given device area in a wafer. Therefore, this invention is capable of fabricating CMOS transistors in the sub-micron regime, and hence is able to increase the level of circuit integration for a given wafer. Furthermore, the present invention provides a method of manufacturing an assembly with different types of high-voltage MOS devices. By making minor adjustments in the height of the N.sup.- regions underneath the source/drain (N.sup.+) regions of different devices, an assembly of MOS devices each having a different voltage operating range can be obtained on an integrated circuit. Moreover, the minor adjustments can be achieved simply by etching the N.sup.- regions to different degrees.

REFERENCES:
patent: 3919008 (1975-11-01), Iwamatsu
patent: 5721148 (1998-02-01), Nishimura
patent: 5757365 (1998-05-01), Kakumu

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