Method of manufacturing amorphous silicon field effect transisto

Details Method of manufacturing amorphous silicon field effect transisto Method of manufacturing amorphous silicon field effect transisto

1986-12-10

1989-01-10

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437101, 437966, 357 237, 148DIG1, H01L 2978

Patent

active

047971088

ABSTRACT:
An a-Si FET comprising electrically conductive source and drain regions supported by an insulating substrate; a layer of amorphous silicon which is separately deposited in a space between said source and drain regions so as to engage the source and drain regions; source and drain electrodes electrically connected with said source and drain regions respectively; a gate electrode disposed adjacent said layer of amorphous silicon; and an insulating layer separating the gate electrode from the amorphous silicon layer; the arrangement being such that, in the ON state of the FET, a direct current-path is established in the layer of amorphous silicon which is disposed in said space. A low cost, low-temperature substrate such as soda glass may be used and the a-Si FET may be of the thin film type. Such an a-Si FET can be used in an LCD device which is addressed using one or more of the FET's.

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patent: 4459739 (1984-07-01), Shepherd et al.
patent: 4700458 (1987-10-01), Suzuki et al.
"Amorphous Siliconl Enlarges LCDs", 8032 Electronics Electronics International, Vol. 55 (1982) May, No. 10, New York, U.S.A., pp. 94 and 96.
"Materials Limitations of Amorphous-Si:H Transistors", Dieter G. Ast, 9093 IEEE Transactions on Electron Devices, vol. ED-30 (1983), No. 5, New York, pp. 532-539.
Sze, Physics of Semiconductor Devices, New York: John Wiley and Sons, 1969.
Ghandhi, VLSI Fabrication Principles, New York: John Wiley and Sons, 1983.

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