Method of manufacturing amorphous silicon antifuse structures

Details Method of manufacturing amorphous silicon antifuse structures Method of manufacturing amorphous silicon antifuse structures

1996-04-29

1998-03-03

Niebling, John

Fishing, trapping, and vermin destroying

437922, 148 55, H01L 2170

Patent

active

057233586

ABSTRACT:
Disclosed is an apparatus and method for manufacturing antifuse structures on topographically varying silicon substrates. The antifuse structures are intelligently formed over topographically lower silicon substrate regions such that subsequent via hole etching processes do not over-etch underlying antifuse structures. Also discloses an apparatus and method for designing dummy metallization and polysilicon features in close proximity to antifuse structures such that subsequently deposited dielectric materials are induced to form thicker dielectric layers over antifuse structures. Advantageously, subsequent via hole etching does not substantially remove antifuse structure materials with may cause detrimental ionic contamination or antifuse infant mortality. In this manner, standard via hole etching techniques may be implemented for all inter-layer via holes without concern the concern of over-etching sensitive underlying devices.

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