Method of manufacturing a SRAM cell having a low stand-by curren

Details Method of manufacturing a SRAM cell having a low stand-by curren Method of manufacturing a SRAM cell having a low stand-by curren

1996-07-24

1998-03-17

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437193, 437918, H01L 218244

Patent

active

057285985

ABSTRACT:
The present invention relates to a method of fabricating a SRAM cell that has a low stand-by current. A second polysilicon layer which is used as polysilicon resistor is exactly over a first polysilicon layer. The double polysilicon layer is utilized to reduced a stand-by current. A electric field is generated between the two layers caused by applying different voltage to the two polysilicon layer respectively, and the carriers in the second polysilicon layer will be repeled to form a depletion region, which will increase the resistance of the second polysilicon layer. Therefore, the stand-by current (Isb) will be reduced.

REFERENCES:
patent: 5025741 (1991-06-01), Suwanai et al.
patent: 5268325 (1993-12-01), Spinner, III et al.
patent: 5474948 (1995-12-01), Yamazaki
patent: 5605859 (1997-02-01), Lee

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