Method of manufacturing a shallow trench isolation structure

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S435000

Reexamination Certificate

active

07022584

ABSTRACT:
A semiconductor device is improved in reliability by suppressing the electric-field concentration at a top edge of a trench or the leak current at a bottom edge thereof. A first thermal oxide film is formed by carrying out low-temperature wet oxidation at a silicon substrate heating temperature of approximately 950° C., extending from over a bottom surface of the trench formed in a main surface of a silicon substrate to an intermediate point on a sidewall of the trench. Thereafter, a second thermal oxide film is formed by carrying out high-temperature dry oxidation at a silicon substrate heating temperature of approximately 1100° C., extending from the intermediate point to over the main surface of the silicon substrate outside the trench.

REFERENCES:
patent: 6465866 (2002-10-01), Park et al.
patent: 6548866 (2003-04-01), Noguchi
patent: 6566224 (2003-05-01), Chang et al.
patent: 2002/0117731 (2002-08-01), Kim et al.
patent: 2001210709 (2001-08-01), None

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