Method of manufacturing a semiconductor package for a die...

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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C257S676000

Reexamination Certificate

active

06927479

ABSTRACT:
A semiconductor package and a method of assembly therefor are provided. A semiconductor package has a die pad and a plurality of bonding fingers. A spacer is attached to the die pad, and a large die is attached to the spacer. The large die is wire bonded to the plurality of bonding fingers using a plurality of bonding wires. The die pad, plurality of bonding fingers, spacer, large die, and bonding wires are encapsulated to form the semiconductor package. The semiconductor package can be either a single or dual row package, such as a QFN or BGA package.

REFERENCES:
patent: 5866939 (1999-02-01), Shin et al.
patent: 6677663 (2004-01-01), Ku et al.
patent: 6753597 (2004-06-01), Crowley et al.
patent: 2003/0001289 (2003-01-01), Yamada et al.

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