Fishing – trapping – and vermin destroying
Patent
1995-04-06
1997-01-21
Tsai, H. Jey
Fishing, trapping, and vermin destroying
437 41, 437203, H01L 21265
Patent
active
055959202
ABSTRACT:
A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.
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IEDM Technical Digest, International Electron Devices Meeting, Washington, D.C., Dec. 1-4, 1985, "A New Programmable Cell Utilizing Insulator Breakdown", Sato, et al., pp. 639-642.
IEDM Technical Digest, International Electron Devices Meeting, San Francisco, Calif., Dec. 11-14, 1988, "High Performance CMOS Surrounding Gate Transistor (SGT) For Ultra High Density LSIs", Takato, et al., pp. 222-225.
Ishizaki Akira
Kohchi Tetsunobu
Miyawaki Mamoru
Momma Genzo
Yuzurihara Hiroshi
Canon Kabushiki Kaisha
Tsai H. Jey
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