Method of manufacturing a semiconductor integrated circuit havin

Details Method of manufacturing a semiconductor integrated circuit havin Method of manufacturing a semiconductor integrated circuit havin

1989-09-01

1991-01-08

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437194, 437200, 437193, H01L 2144

Patent

active

049835432

ABSTRACT:
A method of manufacturing a semiconductor integrated circuit comprises steps of forming at least one semiconductor device on a substrate, depositing an insulator layer on the substrate so as to bury the semiconductor device, providing a contact hole through the insulator layer for exposing a desired part of the semiconductor device, filling the contact hole by a refractory metal for electrical connection, covering the insulator layer by a second insulator layer, forming a groove through the second insulator layer according to a predetermined interconnection pattern such that the groove passes at least one contact hole and such that a top surface of the refractory metal filling the contact hole and a top surface of the first insulator layer are exposed by the groove, forming a material layer acting as nuclei for crystal growth of a second refractory metal at a bottom of the groove substantially continuously along the groove, and depositing the second refractory metal in the groove until the groove is substantially filled by a conductor of the second refractory metal.

REFERENCES:
patent: 4283439 (1981-08-01), Higashinakagawa et al.
patent: 4582563 (1986-04-01), Hazuki et al.
patent: 4584207 (1986-04-01), Wilson
patent: 4617193 (1986-10-01), Wu
patent: 4746621 (1988-05-01), Thomas et al.
patent: 4764484 (1988-08-01), Mo
"High-Density High-Reliability Tungsten Interconnection by Filled Interconnect Groove Metallization", IEEE Transactions on Electron Devices, vol. 35, No. 7, Jul. 1988.
S. K. Ghandhi, VLSI Fabrication Principles, John Wiley & Sons, New York, (1983), pp. 424-427.

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