Fishing – trapping – and vermin destroying
Patent
1989-02-06
1990-10-23
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
148DIG32, 148DIG10, 148DIG38, 148DIG123, 437 31, 437 76, 437162, 437954, 357 43, H01L 2170, H01L 21265
Patent
active
049652206
ABSTRACT:
A semiconductor integrated circuit device is disclosed which comprises a bipolar transistor and a field effect transistor, in which a gate electrode of the field effect transistor and a collector electrode of the bipolar transistor are formed from a common electrode layer of a high impurity concentration, and in which the collector region of the bipolar transistor comprises a region of a high impurity concentration having a conductivity type the same as that of the collector region of the bipolar transistor.
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Ghaudhi, VLSI Fabrication Principles, John Wiley & Sons, New York, NY, 1983, pp. 170-171.
Anantha et al., "Method for Making Self-Aligned MESFETs with Process Compatible with NPN Transistors", IBM TDB, vol. 23, No. 1, Jun. 1980, pp. 167-169.
Castrucci et al., "Bipolar/FET High-Performance Circuit", IBM TDB, vol. 16, No. 8, Jan. 1974, pp. 2719-2720.
Bunch William
Chaudhuri Olik
Kabushiki Kaisha Toshiba
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