Method of manufacturing a semiconductor integrated circuit devic

Details Method of manufacturing a semiconductor integrated circuit devic Method of manufacturing a semiconductor integrated circuit devic

1975-11-21

1977-10-11

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29576E, 29577R, 29578, 148187, 148191, 357 40, 357 45, 357 46, 357 48, 357 50, 357 51, H01L 2120, H01L 2122, H01L 2170

Patent

active

040533360

ABSTRACT:
A semiconductor device having a plurality of constituent components within a semiconductor body such that the device in combination with one of a plurality of different possible metallization patterns of conductors forms a desired circuit arrangement, is provided in a semiconductor body having an epitaxial layer of one conductivity type on a substrate of the same conductivity type and suitable to be employed as a conductive plane, and is manufactured by a method which includes the diffusion step of providing simultaneously within the epitaxial layer regions of opposite conductivity type of the constituent components of the device and a network of conductive tracks, it being possible, for example, for the device to include bipolar transistors of the so-called collector-diffusion-isolation construction or isoplanar construction.

REFERENCES:
patent: 3423650 (1969-01-01), Cohen
patent: 3443176 (1969-05-01), Agusta et al.
patent: 3560277 (1971-02-01), Lloyd et al.
patent: 3575741 (1971-04-01), Murphy
patent: 3590342 (1971-06-01), Jekat
patent: 3615932 (1971-10-01), Makimoto et al.
patent: 3706130 (1972-12-01), Seelbach
patent: 3747200 (1973-07-01), Rutledge
patent: 3772097 (1973-11-01), Davis
patent: 3865648 (1975-02-01), Castrucci et al.
"Integrated-Circuit Transistor Formation" from textbook by R. G. Hibberd; Integrated Circuits, McGraw-Hill, 1969, pp. 34-41.

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