Method of manufacturing a semiconductor integrated circuit devic

Details Method of manufacturing a semiconductor integrated circuit devic Method of manufacturing a semiconductor integrated circuit devic

1985-07-26

1987-05-05

Ozaki, George T.

Metal working

Method of mechanical manufacture

Assembling or joining

29576E, 29576B, 29577C, 148175, 148187, H01L 21425

Patent

active

046620575

ABSTRACT:
The present invention relates to a Bi-CMOS.IC, characterized by comprising a semiconductor substrate of a first conductivity type, and a semiconductor layer of a second conductivity type which is epitaxially grown on one major surface of said semiconductor substrate and which is electrically isolated into a plurality of semiconductor island regions by a thick surface oxide film formed by local oxidation and a semiconductor diffused layer of the first conductivity type formed between said oxide film and said substrate; a bipolar type semiconductor element being formed in one of said island regions, while CMOS type semiconductor elements are formed in the other island regions; the thick surface oxide film formed by the local oxidation being included between a base region and a collector contact region within said one island region formed with said bipolar type semiconductor element, while gate electrodes made of a semiconductor are disposed over said other island regions formed with said CMOS type semiconductor elements.

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patent: 4529456 (1985-07-01), Anzai et al.
patent: 4535531 (1985-08-01), Bhatia et al.
patent: 4536945 (1985-08-01), Gray et al.

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