Method of manufacturing a semiconductor integrated circuit devic

Details Method of manufacturing a semiconductor integrated circuit devic Method of manufacturing a semiconductor integrated circuit devic

1998-04-27

2000-05-02

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

438700, 438701, 438702, 438719, 438738, H01L 21477

Patent

active

060572418

ABSTRACT:
A silicon oxide film 2 which is exposed from a side wall of a groove 4a is etched to displace the silicon oxide film 2 backward toward an active region. The displacement amount is set to be equal to or more than a film thickness (Tr) of a silicon oxide film 5 to be formed on an inner wall of the groove 4a in a later thermal oxidation step and equal to or less than twice the film thickness (Tr) thereof. A shoulder portion of the groove 4a can be rounded by a low-temperature heat treatment at 1000.degree. C. or less, by controlling a heat treatment period such that the film thickness (Tr) of the silicon oxide film 5 is more than the film thickness (Tp) of the silicon oxide film 2 and equal to or less than three times the film thickness (Tr) thereof (Tp<Tr.ltoreq.3Tp)

REFERENCES:
patent: 4576834 (1986-03-01), Sobczak
patent: 4693781 (1987-09-01), Leung et al.
patent: 4810668 (1989-03-01), Ito
patent: 4906585 (1990-03-01), Neppl et al.

Affiliated with

Also associated with

Rating

Method of manufacturing a semiconductor integrated circuit devic does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing a semiconductor integrated circuit devic, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a semiconductor integrated circuit devic will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1593586