Method of manufacturing a semiconductor device with overlapping

Details Method of manufacturing a semiconductor device with overlapping Method of manufacturing a semiconductor device with overlapping

1986-09-08

1987-10-20

Hearn, Brian E.

Fishing, trapping, and vermin destroying

357 24, 437228, 437233, 437235, 437239, H01L 2700, H01L 3100, H01L 2978

Patent

active

047004592

ABSTRACT:
A method is set forth of manufacturing a three-layer electrode system, more particularly for use in CCD image sensors. A group of first electrodes (4A,B,C) is formed on a gate oxide layer (3) by a first silicon layer (4). After etching away the exposed gate oxide, a first thermal oxidation is carried out. Subsequently, an anti-oxidation layer (6) of, for example, silicon nitride is provided, on which a second silicon layer (7) is provided, from which a group of second electrodes (7A,B) is formed. The second electrode overlap the first electrodes in part, whereupon they are subjected to a second thermal oxidation. The exposed part of the anti-oxidation layer (6) is removed by anisotropic plasma etching which maintains parts (6A) on the edge of the first electrodes and under projecting oxide edges. After a third thermal oxidation, a third silicon layer (9) is provided, from which a third group of electrodes (9A,B) is formed, which partially overlap first and second electrodes. The thermal oxidations are carried out in such a manner that the dielectric thickness is the same under all electrodes.

REFERENCES:
patent: 3909925 (1975-10-01), Forbes
patent: 4077112 (1978-03-01), Theunissen
patent: 4280068 (1981-07-01), Snijder
patent: 4332078 (1982-06-01), Peek
IEEE Trans. on Electron Devices, vol. ED-21, No. 12, pp. 758-767, by W. J. Bertram "A Three-Level Metallization Three-Phase CCD".
IEEE Trans. on Electron Devices, vol. ED-21, No. 11, pp. 712-720, by C. H. Sequin et al, "Charge-Couple Area Image Sensor Using Three Levels of Polysilicon".
Physics of Semiconductor Devices, by S. M. Sze, John Wiley & Sons, pp. 412-415.

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