Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2003-02-11
2004-03-16
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C257S295000, C257S310000, C438S240000, C438S653000
Reexamination Certificate
active
06706540
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and to a method of manufacturing the same and, more particularly, to a semiconductor device having a nonvolatile semiconductor memory (FeRAM: Ferroelectric Random Access Memory) using ferroelectric material as a dielectric film of a capacitor and a nonvolatile semiconductor memory (DRAM: Dynamic Random Access Memory) using high-dielectric material as the dielectric film of the capacitor, and to a method of manufacturing the same.
2. Description of the Prior Art
In the FeRAM, the multi-layered wiring technology used in other electronic devices is being employed to meet the demand for the higher integration of the device. However, since the ferroelectric material used in the FeRAM is exposed to the reducing atmosphere containing the hydrogen when the interlayer insulating film, the tungsten plug, the cover film, etc. are formed, the ferroelectric material is easily damaged by the formation of the multi-layered wiring structure.
In order to suppress the degradation of the ferroelectric film constituting the capacitor due to the reducing reaction, several trials were carried out.
For example, in FIG. 1 of Patent Application Publication (KOKAI) Hei 7-111318, it is set forth that, the protection film made of aluminum nitride which is formed above the upper electrode of the capacitor is possible to prevent the reduction of the ferroelectric film of the capacitor caused when the reducing gas permeates through the upper electrode. Also, in FIG. 8 of the same Publication, it is set forth that the protection film is formed on the wiring connected to the upper electrode of the capacitor and on the insulating film covering the capacitor. But no recitation about constituent material and the particular operation of the insulating film is given.
Also, in Patent Application Publication (KOKAI) Hei 9-97883, it is set forth that the lower electrode and the dielectric film constituting the capacitor are formed, then the dielectric film is covered with the insulating film, then the opening for exposing the dielectric film is formed in the insulating film, then the upper electrode of the capacitor is formed in the opening and on the insulating film, and then the protection film having the double-layered structure consisting of titanium and titanium nitride is formed on the upper electrode. This protection film has a function for preventing the diffusion of the hydrogen into the capacitor and the permeation of the moisture into the capacitor.
In FIG. 1 of Patent Application Publication (KOKAI) Hei 7-235639, it is set forth that the lower electrode and the dielectric film constituting the capacitor are formed, then the capacitor is covered with the insulating film, then the opening for exposing the upper electrode is formed in the insulating film, and then the wiring having the double-layered structure containing the titanium tungsten film is formed in the opening and on the insulating film. Also, in
FIG. 2
of the same Publication, it is set forth that the water resisting layer made of silicon nitride is formed on the titan tungsten film over the capacitor except an area of the upper electrode of the capacitor. This water-resistant layer is formed to shut off the permeation of the moisture from the region on which the wiring is not formed.
Also, it is set forth on 17-th Ferroelectric Material Application Conference, Preprint, pp. 17-18 that the metal wiring connected to the capacitor is formed and then the alumina (Al
2
O
3
) film for covering the metal wiring is formed over the overall area of the substrate.
By the way, the structure in which the first level wiring is connected to the upper electrode of the capacitor is disclosed in above references, but it is not set forth to form further second and third level wirings above the capacitor.
Accordingly, since the capacitor is exposed further to the reducing atmosphere during the step of forming the multi-layered wiring above the capacitor, there is the possibility that the degradation of characteristics of the capacitor cannot be satisfactorily suppressed by the protection structure of the above capacitor in above references.
The degradation of the imprint characteristic becomes the greatest problem out of degradations of the ferroelectric capacitor due to the reducing atmosphere. The degradation of the imprint characteristic is such a problem that, if one signal (e.g., “1”) is written into the ferroelectric capacitor, then the ferroelectric capacitor is left for a certain time as it is, and then an opposite signal (e.g., “0”) is written into the capacitor, the opposite signal cannot be read out. In other words, the degradation of the imprint characteristic signifies such a situation that, since the signal in the one direction is imprinted into the capacitor, it is difficult to write the opposite signal into the capacitor.
In the 2-transisitors/2-capacitors type FeRAM, after the positive signal is written into one of two pair of ferroelectric capacitors and the negative signal is written into the other, a difference of the polarization charge between the two capacitors is set to Q.
Then, a difference of the polarization charge between the two ferroelectric capacitors obtained after the ferroelectric capacitors are baked at 150° C. for 88 hours is defined as Q
(88)
&mgr;C/cm
2
, and a degradation rate of the difference Q between the capacitors obtained after an e time (e=natural logarithm) lapsed is defined as a “Q rate”, both are used as indices of the imprint characteristic. In other words, it is understood that, as a value of Q
(88)
is increased larger and an absolute value of the Q rate is reduced smaller, the imprint characteristic becomes excellent much more.
Now the reason to evaluate the ferroelectric capacitor at 150° C. for 88 hours is to assure the 10-year use of the FeRAM under the circumstance of 55° C. Details are set forth in S. D.TRAYNOR, T. D.HADNAGY, and L. KAMMERDINER, Integrated Ferroelectrics, 1997, Vol.16, pp.63-76.
When the degradation of the characteristics of the capacitor due to difference in the wiring structure on the ferroelectric capacitor are evaluated based on the evaluation of the degradation of such ferroelectric capacitor, results shown in Table 1 were obtained by the present inventor's experiments.
TABLE 1
Imprint characteristic of the ferroelectric
capacitor according to steps (5 V evaluation)
steps
Q (88) [&mgr;C/cm
2
]
Q rate [%]
After formation of the
24.6
−1.4
ferroelectric capacitor
After formation of the
24.0
−1.8
second layer metal wiring
After formation of the third
19.2
−5.0
layer metal wiring + the cover film
In Table 1, the state that the first metal wiring is connected to the upper electrode of the ferroelectric capacitor is shown as “after formation of the ferroelectric capacitor”. Also, the state that the second metal wiring is formed on the ferroelectric capacitor is shown as “after formation of the second layer metal wiring”. In addition, the state that the third layer metal wiring and the cover film are formed on the ferroelectric capacitor is shown as “after formation of the third layer metal wiring+the cover film”. The measurement of Q was carried out under the condition applying the voltage of 5 V to the ferroelectric capacitors.
According to Table 1, the Q rate is not so increased until the second layer metal is formed, and thus the degradation of the imprint characteristic is small. However, after the third layer metal wiring and the cover film are formed, the Q rate is increased and thus the degradation of the imprint characteristic appears.
The main causes of the degradation of the imprint characteristic are the CVD process applied to form the tungsten in the reducing atmosphere and the CVD process applied to form the cover film made of silicon nitride in the reduced atmosphere.
Accordingly, with the increase in the number of the wiring layer of the multi-layered wiring structure, the degradation of the imprint charact
Hikosaka Yukinobu
Ozaki Yasutaka
Takai Kazuaki
Armstrong Kratz Quintos Hanson & Brooks, LLP
Lebentritt Michael S.
Wilson Christian D.
LandOfFree
Method of manufacturing a semiconductor device with a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a semiconductor device with a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a semiconductor device with a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3257497