Method of manufacturing a semiconductor device using a polishing

Fishing – trapping – and vermin destroying

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437235, 437238, 148DIG17, 156662, H01L 2100, H01L 2102, H01L 2176, H01L 21306

Patent

active

051889870

ABSTRACT:
A method of manufacturing a semiconductor device comprises the steps of performimg selective vapor growth on a semiconductor substrate, and polishing a surface of an insulative film formed on said semiconductor substrate subsequent to the selective vapor growth step.

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Beyer, Glass Planarization by Stop-Layer Polishing, IBM Tech. Discl. Bull., vol. 27, No. 8, Jan. 1985, pp. 4700-4701.
Shibata, Low Resistive and Selective Silicon Growth as a Self-Aligned Contact Hole Filler and Its Application to 1M bit Static Ram, VLSI Symp. Dig. of Tech. Papers, 1987, p. 75.
Shibata, High Performance Half Micron PMOSFETS with 0.1 .mu.m Shallow P+N Junction Utilizing Selective Silicon Growth and Rapid Thermal Annealing, Proceedings of the IEDM, Dec. 1987, p. 590.
Ghandhi, S., VLSI Fabrication Principles, 1983, Wiley & Sons, pp. 424,425, 517-519.

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