Method of manufacturing a semiconductor device including a trenc

Details Method of manufacturing a semiconductor device including a trenc Method of manufacturing a semiconductor device including a trenc

1990-01-23

1991-11-19

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437 48, 437 60, 437919, 437203, 357 236, H01L 2170

Patent

active

050666096

ABSTRACT:
A method of manufacturing a semiconductor device comprises the steps of selectively etching a semiconductor substrate to form a groove therein, forming a first layer of a conductivity type on the sides and the bottom of the groove, forming a second layer of an insulation type along the inner surface of the first layer and the semiconductor substrate, forming a third layer of a conductivity type along the inner surface of the second layer, patterning the third layer to form a capacitor electrode, forming a fourth layer of an insulation type which covers the capacitor electrode, forming a fifth layer on the fourth layer so as to fill up the groove, etching the fifth layer so as to remain only in the groove, and forming a sixth layer of an insulation type on the fifth layer.

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Tohru Furuyama et al., "An Experimental 4Mb CMOS DRAM", 1986 IEEE International Solid-State Circuits Conference.
Nicky C. C. Lu, "Advanced Cell Structures of Dynamic RAMS" IEEE Circuits and Device Magazine, Jan. 1989, pp. 27-36.
Jambolkar, "Improved Polysilicon-Filled Trench" IBM TD 13, vol. 27, No. 3, Aug. 84.

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