Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
1998-03-31
2001-12-25
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S756000
Reexamination Certificate
active
06333274
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device having a trench isolation, and more specifically, a method of manufacturing a semiconductor device having a trench filled with a seamless insulating film.
A memory cell of a semiconductor memory device, DRAM, is formed of a capacitor and a transfer gate. Each memory cell is isolated from others by a shallow trench filled with an insulating film. The isolation method employed herein is called “Shallow Trench Isolation”.
In the DRAM, in the case where the integration level of the devices is not so high and an opening width of the shallow trench is not so narrow, the trench can be completely filled with the insulating film.
However, with the progress of miniaturization of the device, the opening width of the shallow trench becomes narrow. As a result, it becomes difficult to completely fill the trench with the insulating film. When the shallow trench has a narrow opening width, seams and a void are inevitably formed in the interface of the insulating film buried within the trench and inside the insulating film, respectively. If the seams and void are present, etching is further advanced from the seam formation region and the void is exposed by etching in a later wet-etching process using hydrofluoric acid or ammonium fluoride. Consequently, deformation will be induced and the planarization of the surface will be degraded.
Since these seams and void are filled with polysilicon deposition performed thereafter, the buried polysilicon in the seams and void remains without being removed even if CMP and RIE are applied thereafter. Consequently, short circuiting occurs between gate electrodes, decreasing the yield of the device.
A method for preventing the generation of the seams and void is disclosed in USP publication U.S. Pat No. 4,714,520. In this method, a trench is filled with an insulating film in two steps.
More specifically, a first insulating film is deposited in the trench in a thickness of 30 to 50% of the total depth thereof. After the first insulating film is etched up to 50 to 80% of the total depth, the trench is filled with a second insulating film.
However, the disclosed method employs dry etching using an etching gas such as HCl after the first insulating film is deposited. For this reason, the first insulating film remains after the dry etching in such a manner that it covers the inner-wall of the trench uniformly in almost the same thickness. As a result, the opening width of the trench becomes substantially smaller than designed. If the second insulating film is deposited in this state, the trench cannot be completely filled with the insulating film. The seams and void are inevitably generated.
BRIEF SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of forming a device-isolation trench filled with an insulating film without seams and a void, thereby improving a yield of device.
Another object of the present invention is to provide a method of manufacturing a semiconductor device capable of forming a device-isolation trench filled with an insulating film without seams and a void to prevent electric short circuiting between gate electrodes, thereby preventing a decrease in a yield of the device.
According to the present invention, there is provided a method of manufacturing a semiconductor device comprising the steps of:
forming a trench in a semiconductor substrate;
depositing a first insulating film in the trench;
etching back the first insulating film by a wet-etching method; and
depositing a second insulating film in the trench.
According to the present invention, there is provided a method of manufacturing a semiconductor device comprising the steps of:
forming a trench-type capacitor by forming a first trench in a semiconductor substrate;
forming a second trench in the semiconductor substrate, the second trench serving as device isolation and being shallower than the first trench;
depositing a first insulating film over the entire surface of the semiconductor substrate including the second trench so as not to fill the second trench, completely;
etching back the first insulating film by a wet-etching method;
depositing a second insulating film to fill the second trench, completely; and
forming a transfer gate connected to the trench type capacitor.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
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Akatsu Hiroyuki
Nadahara Soichi
Nakao Takashi
Yoshida Seiko
Banner & Witcoff , Ltd.
Deo Duy-Vu
Kabushiki Kaisha Toshiba
Utech Benjamin L.
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