Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1995-06-06
1997-08-26
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
148DIG28, 438458, 438464, 438461, 438421, H01L 21301
Patent
active
056610912
ABSTRACT:
The invention relates to a method of manufacturing semiconductor devices in which a slice of semiconductor material is provided with a pn junction aligned parallel to the main surfaces of the slice. After the pn junctions is provided, depressions are provided in one main surface. These depressions cut through the pn junction, thereby dividing the main pn junction into mutually insulated pn junction portions. Before the slice is split up into separate semiconductor bodies, a layer of insulating material is provided. This method of manufacturing semiconductor devices allows for a simple application of the insulating layer to the walls of the depressions.
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Duinkerken Geert J.
Hoefsmit Jozeph P.K.
Keizer Josef P.
Biren Steve R.
Bowers Jr. Charles L.
Radomsky Leon
U.S. Philips Corporation
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