Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Patent
1997-04-11
1999-08-31
Niebling, John F.
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
438129, 438183, H01L 2182
Patent
active
059465573
ABSTRACT:
A semiconductor device comprises a plurality of wiring formed on a lower insulating film to be spaced apart from each other, dummy patterns formed on the lower insulating layer between the plurality of wiring and spaced apart from each other, and an upper insulating layer formed to cover the plurality of wiring and the dummy patterns and having therein cavities formed in regions between the plurality of wiring and the dummy patterns.
REFERENCES:
patent: 5293503 (1994-03-01), Nishigoori
patent: 5430325 (1995-07-01), Sawada et al.
Hosoda Yukio
Ichikawa Masaaki
Fujitsu Ltd.
Lattin Christopher
Niebling John F.
LandOfFree
Method of manufacturing a semiconductor device having dummy patt does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a semiconductor device having dummy patt, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a semiconductor device having dummy patt will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2428652