Fishing – trapping – and vermin destroying
Patent
1992-05-08
1994-02-15
Thomas, Tom
Fishing, trapping, and vermin destroying
437 69, 437 60, 437974, 148DIG12, 148DIG135, H01L 21302
Patent
active
052866700
ABSTRACT:
There are disclosed a semiconductor device having electrical elements buried a SOI substrate and a manufacturing method thereof, the manufacturing method of the invention comprising the steps of: (a) forming a first isolating insulator layer at a seed wafer by using an isolation mask, depositing a second isolating insulator layer overlying the first isolating insulator layer and the seed wafer, and defining contact holes by using a contact mask to form contacts on the seed wafer; (b) depositing a first polysilicon layer on the second isolating insulator layer and the contacts and doping an impurity into the first polysilicon layer; (c) patterning the first polysilicon layer to define an electrical element, depositing an insulating layer around the electrical element, and forming a second polysilicon layer overlying the second isolating insulator layer and the insulating layer; (d) doping an impurity into the second polysilicon layer for connecting with a handling wafer, and polishing the second polysilicon layer thus doped to form a mirror surface; (e) depositing an insulating layer for connection on the handling wafer, and performing a thermal process to bond the handling wafer and the mirror surface through the insulating layer for connection; and (f) polishing the seed wafer until the first isolating insulator layer as a polishing stopper is exposed, to form the SOI substrate having an active region where a device is formed, by the invention the efficiency of chip area can be promoted.
REFERENCES:
patent: 4980308 (1990-12-01), Hayashi et al.
patent: 5091330 (1992-02-01), Cambou et al.
patent: 5100814 (1992-03-01), Yamaguchi et al.
patent: 5202273 (1993-04-01), Nakamura
Kang Sang-Won
Kang Won-Gu
Yu Hyun-Kyu
Korea Electronics and Telecommunications Research Institute
Thomas Tom
Trinh Michael
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