Method of manufacturing a semiconductor device having a memory c

Fishing – trapping – and vermin destroying

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437 60, 437919, H01L 2170, H01L 2700

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active

053468430

ABSTRACT:
According to this invention, a conductive film for forming a plate electrode of a capacitor constituting a memory cell is patterned in only a memory cell region at first. After the conductive film in a peripheral circuit region is used as a stopper for wet-etching a low-melting insulating film of the peripheral circuit region, the conductive film is patterned using the same mask as the low-melting insulating film or the low-melting insulating film itself as a mask. For this reason, an SiN film formed by a low pressure CVD method is not used as a stopper, and an additional lithographic step is not required. Therefore, while a memory cell region is planarized and the step of the peripheral circuit region is reduced, data retaining characteristics can be improved without increasing the number of steps.

REFERENCES:
patent: 4603059 (1986-07-01), Kiyosumi et al.
patent: 5043780 (1991-08-01), Fazan et al.
patent: 5218219 (1993-06-01), Ajika et al.

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