Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1995-05-23
1997-09-02
Niebling, John
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
26427217, 29827, 438124, H01L 2160
Patent
active
056631049
ABSTRACT:
A method of manufacturing a semiconductor device for power supply use. A void is formed on a mating face of a pair of metallic molds. Moreover, an island of a lead frame is arranged in the void under the condition that the island is spaced from a surface of the void. A thermosetting resin is injected into the void so that the island and a semiconductor element assembled onto one face of the island are sealed by resin. At this time, a clearance between the other face of the island and one face of the metallic mold opposed to the other face of the island is set to be 2.0 to 0.3 mm and is smaller than a clearance between one face of the island and the other face of the metallic mold opposed to one face of the island. One face of the metallic mold is subjected to satin finish on which the maximum surface roughness H.sub.max is in a range from 3 to 10 .mu.m.
REFERENCES:
patent: 4888307 (1989-12-01), Spairisano et al.
patent: 4961106 (1990-10-01), Butt et al.
patent: 5304843 (1994-04-01), Takubo et al.
patent: 5491111 (1996-02-01), Tai
Lebentritt Michael S.
Niebling John
Rohm & Co., Ltd.
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