Method of manufacturing a semiconductor device by maskless pn ju

Details Method of manufacturing a semiconductor device by maskless pn ju Method of manufacturing a semiconductor device by maskless pn ju

1991-09-17

1992-09-29

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 28, 437149, 148DIG35, H01L 2176

Patent

active

051513820

ABSTRACT:
A semiconductor body (1 ) is provided having a first region (4) of one conductivity type adjacent one major surface (2). An insulating layer (5) is formed on the one major surface and masking means (6,7) are used to form over first and second areas (20 and 21) of the one major surface (2) windows (8,9,10) in the insulating layer (5) through which impurities are introduced to form a relatively highly doped region (11) of the opposite conductivity type adjacent the first area (20) and a relatively lowly doped region (12) of the opposite conductivity type adjacent the second area (21). The surface (5a) of the insulating layer (5) is exposed prior to introducing impurities of the one conductivity type for forming a region (13) within the relatively lowly doped region (12) of the opposite conductivity type and with a dose sufficient to form the region (13) but not sufficient to overdope the relatively highly doped region (11) so avoiding the need to mask the first area (20) during this step. The thickness of the insulating layer (5) is such that a proportion of the impurities of the one conductivity type penetrate the insulating layer (5) to increase the doping of a surface layer(40) of the first region (4) so as to reduce problems such as punch-through effects.

REFERENCES:
patent: 4357622 (1982-11-01), Magdo et al.
patent: 4780425 (1988-10-01), Tabata
patent: 4892837 (1990-01-01), Kudo
patent: 5010026 (1991-04-01), Gomi

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