Method of manufacturing a semiconductor device and semiconductor

Details Method of manufacturing a semiconductor device and semiconductor Method of manufacturing a semiconductor device and semiconductor

1978-08-18

1980-04-22

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

148187, 357 44, 357 50, 357 91, H01L 21225, H01L 2126, H01L 2704

Patent

active

041993780

ABSTRACT:
A method of manufacturing LOCOS transistors in which base doping, emitter doping and emitter metallization are provided via the same aperture. Problems at the edge of the sunken oxide are eliminated by a two-stage doping technique so that the channel stopper diffusion in the epitaxial layer may be omitted, which presents particular advantages in the manufacture of I.sup.2 L devices.

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patent: 4008107 (1977-02-01), Hayasaka et al.
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patent: 4045249 (1977-08-01), Hotta
patent: 4066473 (1978-01-01), O'Brien
patent: 4111720 (1978-09-01), Michel et al.
Evans et al., "Oxide Isolated Ion Implanted-Transistor-," 1973, IEEE Int. Solid St. Circuit Conf., Philadelphia, 1973.
Graul et al., ". . . Double Implanted Transistors," IEEE J. Solid St. Circuit, vol. SC-10, (1971), 201.
Jambotkar, ". . . Bipolar Transistors," IBM-TDB, 19, (1977), 4601.

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