Fishing – trapping – and vermin destroying
Patent
1989-07-12
1992-04-21
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 34, 437 57, 437956, 437984, 148DIG20, 148DIG26, 148DIG102, H01L 2144
Patent
active
051067820
ABSTRACT:
A method of manufacturing a semiconductor device having a semiconductor substrate of a first conductivity type, an N-type diffusion layer formed in the substrate, and a P-type diffusion layer formed in the substrate. Two contact holes are formed in separate steps, thus exposing the N-type diffusion layer and the P-type diffusion layer, respectively. Hence, when one of the diffusion layers is again doped with an impurity, or again heat-treated, the other diffusion layer is already protected by inter-layer insulation film. Therefore, the impurity cannot diffuse into the contact formed in the contact hole made in the other diffusion layer. As a result of this, SAC technique can be successfully achieved, without deteriorating the characteristic of the contact. In addition, since two contact holes are made in a polysilicon wiring strip and the diffusion layer to which the SAC technique is applied, in separate steps, the SAC technique can be successfully accomplished, without deteriorating the characteristic of the MOSFET formed in the semiconductor device.
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patent: 4272304 (1981-06-01), Komatsu
patent: 4433468 (1984-02-01), Kawamata
patent: 4512073 (1985-04-01), Hsu
patent: 4535532 (1985-08-01), Lancaster
patent: 4549914 (1985-10-01), Oh
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Technology for the Fabrication of a 1 MB CMOS Dram, D. S. Yaney et al., AT&T Bell Lab, 1985, IDEM, p. 698.
Hashimoto Kazuhiko
Matsuno Tadashi
Momose Hisayo
Shibata Hideki
Hearn Brian E.
Kabushiki Kaisha Toshiba
Nguyen Tuan
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