Fishing – trapping – and vermin destroying
Patent
1987-09-30
1989-09-26
Lacey, David L.
Fishing, trapping, and vermin destroying
437 83, 437173, 437942, 437973, 148DIG90, 156610, 15662072, H01L 21263
Patent
active
048700312
ABSTRACT:
In a method of manufacturing a semiconductor device comprising melting an amorphous or polycrystalline first semiconductor layer formed on the surface of a first dielectric layer by irradiating energy rays thereon, and converting the same into single crystals by the subsequent lowering of the temperature and forming a second dielectric layer and a second semiconductor layer on the first semiconductor layer. Energy rays are irradiated under the condition capable of melting the first semiconductor layer through the second semiconductor layer and the second dielectric layer and, after the completion of the conversion into single crystals, the second semiconductor layer and the second dielectric layer are eliminated through etching.
REFERENCES:
patent: 3600237 (1971-08-01), Davis et al.
patent: 4330363 (1982-05-01), Biegesen et al.
patent: 4444620 (1984-04-01), Kovacs et al.
patent: 4523962 (1985-06-01), Nishimura
patent: 4599133 (1986-07-01), Miyao et al.
patent: 4661167 (1987-04-01), Kusunoki et al.
patent: 4670086 (1987-06-01), Learny
Possin et al "The Effects of Selectively . . . on Amorphous Substrates" Mat. Res. Soc. Symp. Proc., vol. 13 (1983) Elsevier Science Pub Co.
Zehner et al., "Surface Studies of Lasar Annealed Semi-Conductors" Mat. Res. Soc. Symp. Proc., vol. 13(1983) Elsevier Sci. Pub. Co.
R. Mukai et al. "Single Crystalline Si Islands on an Amorphous, Insulating Layer Recrystallized by an Indirect . . . Circuits" May 15, 1984, pp. 994-996.
Coliage et al, "The Use of Selective Annealing for Growing Very Large Grains in Silicon on Insulating Films" Japanese Journal of Applied Physics, vol. 22, pp. 205-208 (1983).
Inoue Yasuo
Kusunoki Shigeru
Nishimura Tadashi
Sugahara Kazuyuki
Johnson L.
Kozo Iizuka, Director General, Agency of Industrial Science and
Lacey David L.
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