Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

1985-09-03

1987-09-01

Bashore, S. Leon

Fishing, trapping, and vermin destroying

148DIG11, 148DIG51, 148DIG103, 156643, 156648, 156653, 156662, 437 31, 437 20, 437 41, H01L 2122, H01L 21265, H01L 21318

Patent

active

046898727

ABSTRACT:
For providing semiconductor zones (16, 18, 26) and contact metallization (19, 27) within an opening (9) in a self-registered manner, which opening is provided along its edge with polycrystalline connection parts (10) separated by an insulating material (15) from the metallization (19, 27), a protective layer (11) is formed which is maintained within the opening (9)until within this opening (9) the connection parts (10) are formed by anisotropic etching from a uniform layer of polycrystalline semiconductor material (10). The method is suitable for the manufacture of both bipolar transistors and field effect transistors.

REFERENCES:
patent: 3886569 (1975-05-01), Basi et al.
patent: 4074304 (1978-02-01), Shiba
patent: 4113533 (1978-09-01), Okumura et al.
patent: 4305760 (1981-12-01), Trudel
patent: 4481706 (1984-11-01), Roche
patent: 4506437 (1985-03-01), Godejahn
patent: 4507171 (1985-03-01), Bhatia et al.
patent: 4545114 (1985-10-01), Ito et al.
IBM TDB, vol. 27, No. 2, Jul. 1984, Shepard, "Self-Aligned Bipolar Transistor", pp. 1008-1009.

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