Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

1988-06-07

1992-08-04

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 56, 437 58, 437186, H01L 21336, H01L 27088

Patent

active

051358808

ABSTRACT:
A method of manufacturing a semiconductor device including both an enhancement (1) insulated gate field effect transistor (IGFET) and a depletion (2) mode IGFET is described. Impurities are introduced into a first region or epitaxial layer (4) of one conductivity type adjacent a given surface (3a) of a semiconductor body (3) to provide, for both the enhancement mode (1) and for the depletion mode (2) IGFET, a second region (5) of the opposite conductivity type adjacent the given surface, a source region (9) of a first conductivity type adjacent the given surface (3a) and surrounded by the second region (5) and a drain region (10) of the first conductivity type having a relatively lightly doped drain extension region (11) adjacent the given surface and extending toward the source region (9). First and second insulated gates (12) are provided on first and second areas (31a) and (31b), respectively, of the given surface to provide a respective gate connection between each source region and the associated drain region (10). The relative doses of impurities introduced to provide the second regions (5) and the relatively lightly doped drain extensions (11) received by the first area (31a) and the second area (31b) are independently controlled so as to provide adjacent the first area (31a) a channel area (13) of a second conductivity type and adjacent the second area (31b) a channel area (13') of the first conductivity.

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