Semiconductor device manufacturing: process – Forming schottky junction – Using refractory group metal
Reexamination Certificate
2009-01-23
2011-10-18
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Forming schottky junction
Using refractory group metal
C438S630000, C438S648000, C438S650000, C438S682000, C438S685000, C257S388000, C257S455000, C257S456000, C257S576000, C257S757000, C257SE21006, C257SE21593
Reexamination Certificate
active
08039378
ABSTRACT:
To provide a technique capable of improving the reliability of a semiconductor element and its product yield by reducing the variations in the electrical characteristic of a metal silicide layer. After forming a nickel-platinum alloy film over a semiconductor substrate1, by carrying out a first thermal treatment at a thermal treatment temperature of 210 to 310° C. using a heater heating device, the technique causes the nickel-platinum alloy film and silicon to react with each other to form a platinum-added nickel silicide layer in a (PtNi)2Si phase. Subsequently, after removing the unreacted nickel-platinum alloy film, the technique carries out a second thermal treatment having the thermal treatment temperature higher than that of the first thermal treatment to form the platinum-added nickel silicide layer in a PtNiSi phase. The temperature rise rate of the first thermal treatment is set to 10° C./s or more (for example, 30 to 250° C./s) and the temperature rise rate of the second thermal treatment is set to 10° C./s or more (for example, 10 to 250° C./s).
REFERENCES:
patent: 6218249 (2001-04-01), Maa et al.
patent: 2001/0012666 (2001-08-01), Hsu
patent: 2002/0090757 (2002-07-01), Komori
patent: 2002/0132473 (2002-09-01), Chiang et al.
patent: 2006/0014387 (2006-01-01), Robertson et al.
patent: 2007/0093047 (2007-04-01), Okuno et al.
patent: 2007/0161197 (2007-07-01), Matsuda et al.
patent: 2009/0155999 (2009-06-01), Chen et al.
patent: 5-29343 (1993-02-01), None
patent: 11-251591 (1999-09-01), None
patent: 2007-142347 (2007-06-01), None
patent: 2007-184420 (2007-07-01), None
Futase Takuya
Inaba Yutaka
Okada Shigenari
Kim Su
Miles & Stockbridge P.C.
Renesas Electronics Corporation
Smith Matthew
LandOfFree
Method of manufacturing a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4264282