Method of manufacturing a semiconductor device

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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C438S107000, C438S113000, C257SE21511

Reexamination Certificate

active

07829381

ABSTRACT:
A method of manufacturing a semiconductor device comprising the steps of (1) applying an underfill composition to a surface of a silicon wafer, (2) dicing the silicon wafer into chips, (3) positioning the chip, and (4) bonding the chip to the substrate, characterized in thatthe underfill composition consists of a first underfill composition and a second underfill composition,the step (1) comprises the steps of(i) applying the first underfill composition on the surface of the silicon wafer and then bringing the applied first underfill composition into a B-stage to form a layer of the first underfill composition having a thickness ranging from 0.5 to 1.0 time the height of the solder bump, and(ii) applying the second underfill composition on the B-stage first underfill composition layer and bringing the applied second underfill composition into a B-stage to form a layer wherein a total thickness of the B-stage first underfill composition and the B-stage second underfill composition ranges from 1.0 to 1.3 times the height of the solder bump, and thatthe first underfill composition comprises an epoxy resin and a filler, the filler being in an amount of from 30 to 85 wt % of a solid content of the first underfill composition, andthe second underfill composition comprises an epoxy resin, a flux and/or a curing agent functioning also as a flux.

REFERENCES:
patent: 5128746 (1992-07-01), Pennisi et al.
patent: 2002/0109228 (2002-08-01), Buchwalter et al.
patent: 2006/0134901 (2006-06-01), Chaware et al.
patent: 4-280443 (1992-10-01), None
patent: 2000-174044 (2000-06-01), None
patent: 2003-243449 (2003-08-01), None
patent: 2005-268704 (2005-09-01), None
patent: 2006-229199 (2006-08-01), None

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