Method of manufacturing a semiconductor device

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support

Reexamination Certificate

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C438S127000

Reexamination Certificate

active

07445969

ABSTRACT:
For molding semiconductor chips on a wiring substrate matrix with a sealing resin, the wiring substrate matrix is placed on a lower die cavity block of a lower die, and, thereafter, an upper die is brought down, whereby an outer peripheral portion of a cavity of the upper die comes into abutment against an outer peripheral portion of a main surface of the wiring substrate matrix, causing the substrate matrix to be deformed a sufficient extent to prevent resin leakage. Thereafter, block pins provided on the upper die push down the lower die cavity block. Thus, when clamping the wiring substrate matrix using both upper and lower dies, it is possible to suppress or prevent the application of excessive pressure to the wiring substrate matrix and to suppress or prevent deformation or cracking caused by crushing of the wiring substrate matrix. Consequently, the semiconductor device manufacturing yield can be improved.

REFERENCES:
patent: 5798070 (1998-08-01), Sakai et al.
patent: 5894006 (1999-04-01), Herbst
patent: 6956296 (2005-10-01), Boyaud et al.
patent: 2004/0048416 (2004-03-01), Takase
patent: 2006/0054901 (2006-03-01), Shoji et al.
patent: 2006/0198921 (2006-09-01), Fujita
patent: 2006/0223227 (2006-10-01), Kubota et al.
patent: 10-092853 (1998-04-01), None
patent: 2000-058571 (2000-02-01), None
patent: 2001-223229 (2001-08-01), None

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