Method of manufacturing a semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material

Reexamination Certificate

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C438S586000, C438S689000, C438S758000

Reexamination Certificate

active

10164019

ABSTRACT:
A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.

REFERENCES:
patent: 4051273 (1977-09-01), Abbas et al.
patent: 4266985 (1981-05-01), Ito et al.
patent: 4592306 (1986-06-01), Gallego
patent: 4636401 (1987-01-01), Yamazaki et al.
patent: 4748131 (1988-05-01), Zietlow
patent: 4892753 (1990-01-01), Wang et al.
patent: 4894352 (1990-01-01), Lane et al.
patent: 4917556 (1990-04-01), Stark et al.
patent: 4923584 (1990-05-01), Bramhall, Jr. et al.
patent: 4951601 (1990-08-01), Maydan et al.
patent: 4962063 (1990-10-01), Maydan et al.
patent: 5067218 (1991-11-01), Williams
patent: 5076205 (1991-12-01), Vowles et al.
patent: 5135608 (1992-08-01), Okutani
patent: 5186718 (1993-02-01), Tepman et al.
patent: 5237188 (1993-08-01), Iwai et al.
patent: 5258333 (1993-11-01), Shappir et al.
patent: 5259881 (1993-11-01), Edwards et al.
patent: 5271972 (1993-12-01), Kwok et al.
patent: 5292393 (1994-03-01), Maydan et al.
patent: 5313075 (1994-05-01), Zhang et al.
patent: 5324360 (1994-06-01), Kozuka
patent: 5330633 (1994-07-01), Matsumoto et al.
patent: 5338362 (1994-08-01), Imahashi
patent: 5352291 (1994-10-01), Zhang et al.
patent: 5370739 (1994-12-01), Foster et al.
patent: 5403772 (1995-04-01), Zhang et al.
patent: 5424244 (1995-06-01), Zhang et al.
patent: 5445491 (1995-08-01), Nakagawa et al.
patent: 5512320 (1996-04-01), Turner et al.
patent: 5521107 (1996-05-01), Yamazaki et al.
patent: 5523075 (1996-06-01), Fuerst et al.
patent: 5545571 (1996-08-01), Yamazaki et al.
patent: 5583369 (1996-12-01), Yamazaki et al.
patent: 5665210 (1997-09-01), Yamazaki
patent: 5766360 (1998-06-01), Sato et al.
patent: 5807772 (1998-09-01), Takemura
patent: 5821559 (1998-10-01), Yamazaki et al.
patent: 5849043 (1998-12-01), Zhang et al.
patent: 5854494 (1998-12-01), Yamazaki et al.
patent: 5897710 (1999-04-01), Sato et al.
patent: 5899709 (1999-05-01), Yamazaki et al.
patent: 5917221 (1999-06-01), Takemura
patent: 5946561 (1999-08-01), Yamazaki et al.
patent: 6004831 (1999-12-01), Yamazaki et al.
patent: 6013928 (2000-01-01), Yamazaki et al.
patent: 6028333 (2000-02-01), Yamazaki et al.
patent: 6144057 (2000-11-01), Yamazaki
patent: 6177302 (2001-01-01), Yamazaki et al.
patent: 6261877 (2001-07-01), Yamazaki et al.
patent: 6326642 (2001-12-01), Yamazaki et al.
patent: 6340830 (2002-01-01), Takemura
patent: 6358784 (2002-03-01), Zhang et al.
patent: 6482752 (2002-11-01), Yamazaki et al.
patent: 6528852 (2003-03-01), Takemura
patent: 6566711 (2003-05-01), Yamazaki et al.
patent: 6607947 (2003-08-01), Zhang et al.
patent: 6655767 (2003-12-01), Zhang et al.
patent: 6815772 (2004-11-01), Takemura
patent: 6979840 (2005-12-01), Yamazaki et al.
patent: 2002/0000554 (2002-01-01), Yamazaki et al.
patent: 2002/0027249 (2002-03-01), Takemura
patent: 2003/0122131 (2003-07-01), Zhang et al.
patent: 2003/0122194 (2003-07-01), Takemura
patent: 2003/0173570 (2003-09-01), Yamazaki et al.
patent: 2004/0031961 (2004-02-01), Zhang et al.
patent: 2004/0115940 (2004-06-01), Zhang et al.
patent: 2006/0060852 (2006-03-01), Yamazaki et al.
patent: 1085352 (1994-04-01), None
patent: 0 468 758 (1992-01-01), None
patent: 0 485 233 (1992-05-01), None
patent: 0 532 314 (1993-03-01), None
patent: 60-043869 (1985-03-01), None
patent: 60-245174 (1985-12-01), None
patent: 02-159069 (1990-06-01), None
patent: 2-266519 (1990-10-01), None
patent: 03-044058 (1991-02-01), None
patent: 3-022057 (1991-03-01), None
patent: 3-070367 (1991-07-01), None
patent: 0 459 763 (1991-12-01), None
patent: 04-080928 (1992-03-01), None
patent: 4-137522 (1992-05-01), None
patent: 04-137613 (1992-05-01), None
patent: 04-165679 (1992-06-01), None
patent: 05-036606 (1993-02-01), None
patent: 05-055148 (1993-03-01), None
patent: 05-074716 (1993-03-01), None
patent: 05-129609 (1993-05-01), None
patent: 05-152331 (1993-06-01), None
patent: 05-152333 (1993-06-01), None
patent: 05-232515 (1993-09-01), None
patent: 05-259083 (1993-10-01), None
patent: 05-259259 (1993-10-01), None
patent: 05-267667 (1993-10-01), None
patent: 05-275344 (1993-10-01), None
patent: 5-275519 (1993-10-01), None
patent: 05-291575 (1993-11-01), None
patent: 05-315359 (1993-11-01), None
patent: 05-326430 (1993-12-01), None
patent: 05-335572 (1993-12-01), None
patent: 05-343689 (1993-12-01), None
patent: 08-167597 (1996-06-01), None
Nikkei Microdevices Oct. 1993, entitled “Outlook of a Single Substrate Plasma Enchanced CVD Apparatus for Manufacturing Thin Film Transistors (TFTs) Liquid Crystal Has Been Made Clear” by Nikkei.
Fine Process Technology Japan 1993, pp. 1-11 entitled “A New Multi-Chamber Single Substrate Plasma Enhanced CVD System” by James M. Moriarty, English Translation.
Wolf, Stanley, “Silicon Processing for the VLSI ERA,” vol. 1, Lattice Press, 1986, pp. 177-178.
Wolf, Stanley, “Silicon Processing for the VLSI ERA,” vol. 2, Lattice Press, 1990, pp. 188-199, 194-196 and 238-239.
S. Wolf and R.N. Tauber, “Silicon Processing for the VLSI ERA,” vol. 1—Process Technology, pp. 57-58.
Harriott, “In Situ Processing for Semiconductor,” Journal of Materials Science and Engineering, B14 (Jan. 1992) pp. 336-345.
Wolf et al., “Silicon Processing For the VLSI Era”, vol. 1, 1986, pp. 175-178, 182-183, 185-188 and 191-194.
Wolf et al., “Silicon Processing For the VLSI Era”, vol. 2, 1990, pp. 188-189, 194-195, 220-222 and 235-239.

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