Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

2007-04-03

2007-04-03

Smith, Zandra V. (Department: 2822)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

C438S406000, C438S459000

Reexamination Certificate

active

10759297

ABSTRACT:
There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.

REFERENCES:
patent: 4583122 (1986-04-01), Ohwada et al.
patent: 4665419 (1987-05-01), Sasaki
patent: 4786955 (1988-11-01), Plus et al.
patent: 5130770 (1992-07-01), Blane et al.
patent: 5258323 (1993-11-01), Sarma et al.
patent: 5261999 (1993-11-01), Pinker et al.
patent: 5317236 (1994-05-01), Zavracky et al.
patent: 5341028 (1994-08-01), Yamaguchi et al.
patent: 5387555 (1995-02-01), Linn et al.
patent: 5550070 (1996-08-01), Funai et al.
patent: 5569620 (1996-10-01), Linn et al.
patent: 5574292 (1996-11-01), Takahashi et al.
patent: 5581092 (1996-12-01), Takemura
patent: 5710057 (1998-01-01), Kenney
patent: 5750000 (1998-05-01), Yonehara
patent: 5821138 (1998-10-01), Yamazaki et al.
patent: 5840616 (1998-11-01), Sakaguchi et al.
patent: 5849627 (1998-12-01), Linn et al.
patent: 5854123 (1998-12-01), Sato et al.
patent: 5962897 (1999-10-01), Takemura et al.
patent: 5966594 (1999-10-01), Adachi et al.
patent: 5966620 (1999-10-01), Sakaguchi et al.
patent: 5982002 (1999-11-01), Takasu et al.
patent: 6051453 (2000-04-01), Takemura
patent: 6054363 (2000-04-01), Sakaguchi et al.
patent: 6118148 (2000-09-01), Yamazaki
patent: 6184556 (2001-02-01), Yamazaki et al.
patent: 6207969 (2001-03-01), Yamazaki
patent: 6262438 (2001-07-01), Yamazaki et al.
patent: 6287900 (2001-09-01), Yamazaki et al.
patent: 6455401 (2002-09-01), Zhang et al.
patent: 0 485 233 (1992-05-01), None
patent: 10-012889 (1998-01-01), None
patent: 10-064817 (1998-03-01), None
patent: 10-133233 (1998-05-01), None
patent: 10-135350 (1998-05-01), None
Bruel, Silicon on insulator material technology, Jul. 1995, Electonics Letters, vol. 34, Issue 14, pp. 1201-1202.
K. Sakaguchi et al., “Current Progress in Epitaxial Layer Transfer (ELTRAN),” IEICE Trans. Electron, vol. E80 C. No. 3, pp. 378-387, Mar. 1997.
A.J. Auberton-Herve et al., “Industrial Research Society (Kogyo Chosa Kai),” Electronic Material, pp. 83-87, Aug. 1997.

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